Various techniques for sensing data in configuration memory cells have been employed, including clocked sense amplifiers, current mirror sense amplifiers, and inverter logic feeding directly into a flip-flop. Each of these techniques has significant drawbacks.
Clocked sense amplifiers are typically cross-coupled circuits that require specific timing between bit line signal development and a capture signal. Such circuits depend upon precise signal timing and tend to be highly sensitive to noise.
Current-mirror sense amplifiers are not dependent on a capture signal and the associated timing constraints, but leak current in certain states.
Techniques employing inverter logic feeding directly into a flip flop are dependent for their operation on both the threshold of the inverter and the timing of the clock to the flip-flop.